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Nov 23, 2024
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CE 1910 - Digital Logic II: Sequential Systems2 lecture hours 2 lab hours 3 credits Course Description This course introduces sequential logic analysis and design. The topics include flip-flops, registers, counters, shift-registers, algorithmic state machines, and memories. Emphasis is placed on the VHDL hardware description language as a vehicle for circuit description and simulation. Laboratory exercises require the student to design, simulate, implement, and test a wide range of digital circuits using standard logic families and programmable logic devices. (prereq: CE 1900 ) Course Learning Outcomes Upon successful completion of this course, the student will be able to: • analyze sequential logic circuits
• design sequential logic circuits
• apply datasheets during analysis and design
• draw timing diagrams for sequential logic circuits
• write VHDL descriptions of sequential logic circuits Prerequisites by Topic • Number systems
• Logic gates
• Arithmetic circuits
• Combinational logic building blocks
• Combinational system analysis
• Combinational system design
• VHDL description and simulation of combinational systems Course Topics • basic memory elements: latches and flip flops (3 classes)
• registers (2 classes)
• algorithmic state machines (8 classes)
• counters (4 classes)
• algorithmic state machines (7 classes)
• memories: register files, ROM, RAM, address bus, data bus (4 classes)
• timing: integrated daily
• VHDL: integrated daily
• Altera Quartus Design Suite: integrated daily Laboratory Topics • design and analysis of sequential logic circuits implemented with standard logic families
• design and analysis of sequential logic circuits implemented with field programmable gate arrays
• design and simulation of sequential logic circuits using computer-aided design tools
• architectural description of sequential logic circuits using the VHDL hardware description language
• basic test and measurement of sequential logic circuits using oscilloscopes and logic analyzers Coordinator Russell Meier
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