CPE 1500 - Digital Logic

• Perform binary and hexadecimal arithmetic on signed integer, unsigned integer, and fixed-point decimal numbers 
• Document combinational and sequential logic circuits using truth tables, waveform diagrams, gate-level schematic diagrams, finite-state machine diagrams, and data path diagrams
• Design combinational and sequential logic circuits using Boolean algebra, Karnaugh maps, the Quine-McCluskey algorithm, schematic drawing, and text descriptions written in a hardware description language
• Implement and test logic circuits using chips from integrated circuits logic families and families of programmable logic devices
• Evaluate design solutions in the context of realistic design constraints including timing, circuit size, power consumption, and cost 
• Read and apply functional and electrical specifications provided on manufacturer data sheets 

• None

• Binary and hexadecimal integer and fixed-point numbers
• Alphanumeric encodings in ASCII and Unicode 
• Logical truth tables, logic operators, and distinctive-shape logic symbols
• CMOS implementation of logic operators
• Static electrical characteristics including power, level voltages VOH and VOL, noise margins, fan-in, and fan-out 
• Dynamic electrical characteristics including propagation delay, rise-time, and fall-time
• Canonical sum-of-product and product-of-sum equations 
• Boolean algebra reduction of canonical equations to minimized sum-of-product or product-of-sum form 
• Gate-level circuits in AND-OR, OR-AND, NAND-NAND, NOR-NOR and mixed-logic forms
• Multiplexer and demultiplexers
• Standard decoders and seven-segment decoders
• Encoders and priority encoders
• Canonical and minimized equations built using multiplexers and decoders
• Full adders
• Ripple-carry adders
• Subtractors
• Carry lookahead adders
• Carry-select adders
• Shifters
• Comparators 
• Latches and flip-flops in SR, D, JK, and T forms
• Parallel register
• Shift register
• Single-port register-file
• Static RAM, ROM, and EEPROM
• Moore and Mealy finite state machines
• State diagrams and algorithmic state charts
• Data path control
• Programmable logic arrays
• Programmable look-up tables (LUTs)
• FPGA or CPLD programmable device architecture
• Synthesis constraints in FPGA and CPLD design
• Design for testability
• Stuck-at-faults

• Design, analysis, simulation, and testing of combinational and sequential logic circuits using both paper-and-pencil and computer-aided design skillsets. 
• Circuit implementation using wired MSI/LSI integrated circuits from standard logic families 
• Circuit implementation using programmed FPGA or CPLD devices
• Testing and debugging using waveform generators, oscilloscopes, logic analyzers, and logic probes