Oct 07, 2022  
2020-2021 Undergraduate Academic Catalog 
    
2020-2021 Undergraduate Academic Catalog [ARCHIVED CATALOG]

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CE 1911 - Digital Logic 2

3 lecture hours 2 lab hours 4 credits
Course Description
This course introduces sequential logic analysis and design. The topics include flip-flops, registers, counters, shift-registers, algorithmic state machines, basic algebraic data paths, register files, and memories. Emphasis is placed on the VHDL hardware description language as a vehicle for circuit description and simulation. Laboratory exercises require the student to design, simulate, implement, and test a wide range of sequential digital circuits using standard logic families and programmable logic devices. (prereq: CE 1901 )
Course Learning Outcomes
Upon successful completion of this course, the student will be able to:
  • Analyze sequential logic circuits 
  • Design sequential logic circuits using paper-based techniques such as Boolean algebra and Karnaugh maps
  • Design sequential logic circuits using the VHDL hardware description language
  • Apply datasheets during analysis and design 
  • Draw timing diagrams for sequential logic circuits 

Prerequisites by Topic
  • Binary and hexadecimal number systems 
  • Logic gates 
  • Boolean algebra
  • Arithmetic circuits 
  • Combinational logic building blocks
  • Combinational system analysis
  • Combinational system design 
  • VHDL description and simulation of combinational systems

Course Topics
  • Basic one-bit memory elements: latches and flip flops
  • Registers 
  • Algorithmic finite state machines
  • Counters 
  • Larger memories: register files, ROM, RAM, address buses, data buses
  • Special-purpose data path design
  • Data path controllers

Laboratory Topics
  • Design and analysis of sequential logic circuits implemented with standard logic families 
  • Design and analysis of sequential logic circuits implemented with field programmable gate arrays 
  • Design and simulation of sequential logic circuits using computer-aided design tools 
  • Structural and behavioral architectural description of sequential logic circuits using the VHDL hardware description language 
  • Basic test and measurement of sequential logic circuits using oscilloscopes and logic analyzers

Coordinator
Dr. Russ Meier



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