Nov 21, 2024  
2014-2015 Graduate Academic Catalog 
    
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2014-2015 Graduate Academic Catalog [ARCHIVED CATALOG]

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EE 593 - Advanced Microprocessors

2 lecture hours 2 lab hours 3 credits
Course Description
This course provides students an understanding of the architecture and programming techniques for advanced microprocessors/controllers. Topics discussed include organization, data format, instruction set, addressing modes, and timing diagram. The course also introduces students to interfacing memory and I/O devices. Architecture and organization of Intel 80x86 microprocessors family and Motorola/Analog Devices DSP microprocessors will be discussed. (prereq: EE-2902, EE-2920)
Course Learning Outcomes
Upon successful completion of this course, the student will be able to:
• Describe the relative advantages and disadvantages of the 16-bit microprocessors versus 8-bit microprocessors.
• Describe the architecture and operation of the 8086 microprocessor family.
• Write and execute programs for a 16-bit microprocessor to work with multiple precision data in signed binary, unsigned binary, binary coded decimal or ASCII.
• Design interfacing for memory devices to the 8086 including dynamic RAM.
• Utilize macros and subroutines to develop modular programs.
• Understand interrupt routines.
• Design a software system using engineering principles, software engineering and the assembly language
• Write concise engineering reports with an engineering analysis, verification and condlusion sequence
Prerequisites by Topic
• Combinational and sequential logic design.
• Introductory 8-bit microprocessor course.
Course Topics
• Introduction to 16-bit microprocessors. (1 class)
• Intel 8086 family architecture, data formats, instruction set and addressing modes. (5 classes)
• Introduction to Borland Assembler, Linker, and Debugger. (2 classes)
• Data movement instructions. (2 classes)
• Arithmetic and logic instructions. (4 classes)
• Program control instructions. (2 classes)
• Macros and subroutines, including PC-BDOS and PC BIOS routines. (2 classes)
• Memory interfacing including timing requirements and dynamic RAM controllers. (6 classes)
Laboratory Topics
• None appended
Coordinator
Joerg Mossbrucker


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