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Jan 15, 2025
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EE 2902 - Sequential Logic Circuits3 lecture hours 3 lab hours 4 credits Course Description This course is the second course of a two-course sequence to provide students with the practical knowledge of digital logic systems. The goal of this course is to develop the ability to analyze and design sequential logic circuits used to construct digital systems. Topics discussed include flip-flops, timing and state diagrams, analysis and design of sequential circuits, and memory devices. Students design a digital system, such as a video driver or communications module. VHDL is used for design and an FPGA is used for logic realization. Digital circuit simulators and logic analyzers are used in the design and (prereq: EE 2900 ) Course Learning Outcomes Upon successful completion of this course, the student will be able to: • Design synchronous sequential circuits using state diagrams, simplify design circuits, and implement the design using schematic entry, VHDL, and Altera MegaWizard on a programmable logic device.
• Use commercially available digital-design software tools and evaluation boards to design, simulate and implement complex design circuits.
• Describe the behavior of Flip-Flops and Latches.
• Describe the operation of memories.
• Describe the configuration of programmable logic devices to implement sequential circuits. Prerequisites by Topic • Combinational logic design techniques Course Topics • Latches, flip-flops, register, timing requirements (3 classes)
• Implementation of latches, flip-flops, registers in VHDL (2 classes)
• Counters and VHDL implementation, frequency division issues (2 classes)
• State machines, state diagrams, behavioral description of state machines in VHDL (4 classes)
• Implementation of sequential circuits and state machines in FPGA logic elements (1 class)
• MOS transistor, ROM, SRAM, DRAM, implementation using Altera MegaWizard (3 classes)
• Case studies (e.g., VGA driver, simple microprocessor design, VHDL implementation, discussion of design tradeoffs) (10 classes)
• Review sessions and exams (5 classes) Laboratory Topics • Design and implementation of basic element such as latch or flip-flop in schematic entry or VHDL.
• Design and implementation of register in schematic entry or VHDL.
• Design and implementation of counter using VHDL.
• Design and implementation of state machine using behavioral style VHDL. (2 labs)
• Design and implementation of RAM using Altera MegaWizard, schematic, and/or VHDL, and/or interface with external memory.
• Design and implementation of digital system. (3 labs) Coordinator Sheila Ross
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