ET 3900 - Design of Logic Systems

3 lecture hours 2 lab hours 4 credits

Course Description
The design, analysis and typical applications of logic elements and systems are studied in this course. The course begins with a brief review of combinational and sequential logic circuits. A variety of representations of digital systems are covered including state diagrams, algorithmic state machine (ASM) charts, and a hardware description language. The lectures present the theory of logic design and the laboratory provides projects for the student to apply the theory. Designs will be tested using simulation and implemented using programmable logic devices (PLDs) or field programmable gate arrays (FPGAs). (prereq: full admission into the BS-EET program or permission of an EET program advisor.)

Course Learning Outcomes
Upon successful completion of this course, the student will be able to:

Model digital systems using Boolean function, truth tables, Karnaugh Maps, and Hardware Description Language.
Design a combinational digital subsystem using VHDL and verify the correct operation through simulation and/or implementation
Design, simulate and/or implement sequential circuits using various representation such as state diagrams, ASM charts, and hardware description language, specifically VHDL
Describe the design and verification process through written communication in the form of laboratory reports
Use state-of-the art design and development tools for Digital Systems

Prerequisites by Topic

Basic Boolean Algebra
Analysis of Combinational and Sequential Circuits
Use of Karnaugh Map as a minimization tool

Course Topics

Sequential Circuits and bi-stable memory elements (2 classes)
Counters and Registers (2 classes)
Synchronous State Machines representation and Design (6 classes)
Introduction to Asynchronous Sequential Circuits (3 classes)
Exams (4 classes)
Review (2 classes)
Design of Combinational Circuits (3 classes)
Review of number systems & conversion (binary, decimal, hexadecimal) (1 class)
Review the combinational logic representation, minimization and design process (5 classes)
Counters and Registers (1 class)
Synchronous State Machines representation and Design (10 classes)
State diagram and ASM diagram (1 class)
Time response of Sequential Circuits (1 class)

Coordinator
Hue Tran

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ET 3900 - Design of Logic Systems