CE 2930 - Introduction to Computer Architecture

• Use the VHDL hardware description language to implement and simulate a digital system
• Understand the parameters that determine CPU performance (clock cycle time, CPI, instruction count)
• Explain how the CPU implementation and the instruction set influence the performance parameters
• Implement a general-purpose register RISC CPU with instructions such as load-word, store-word, beq, addi, jump, etc.
• Understand the concepts of pipelining such as hazard detection, data forwarding, and branch handling

• Digital logic design
   

• Introduction to the course (1 class)
• Basic computer design concepts (1 class)
• System performance (3 classes)
• Instruction set design and related issues including operand types, addressing modes, instruction types (2 classes)
• Instruction set examples (2 classes)
• Design of computational circuits (2 classes)
• Carry-look-ahead adders (2 classes)
• Single cycle CPU implementation (3 classes)
• Multi-cycle CPU implementation (3 classes)
• Micro-programming (2 classes)
• Pipeline implementation (4 classes)
• Principles of cache design (2 classes)
• Hour examinations (2 classes)
• Altera Quartus Design Suite: integrated daily

• VHDL design and simulation of a single-cycle MIPS microprocessor
• VHDL design and simulation of a pipelined MIPS microprocessor